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ISD9160 datasheet publication release date: oct 29, 2011 - 1 - revision v1.20 isd cortex? -m0 chipcorder isd 9160 datasheet the information described in this document is the e xclusive intellectual property of nuvoton technology corporation and shall not be re produced without permission from nuvoton. nuvoton is providing this document only for referen ce purposes of isd chipcorder microcontroller based system design. nuvoton assumes no responsibil ity for errors or omissions. all data and specifications are subject to change w ithout notice. for additional information or questions, please con tact: nuvoton technology corporation. www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 2 - revision v1.20 table of contents- table of contents- ................................ ................................................... ............ 2 1 general description ............................... ................................................... ................... 3 2 features .......................................... ................................................... ............................... 4 3 part information and pin configuration ............ .................................................. 7 3.1 pin configuration ................................. ................................................... .................... 7 3.1.1 ISD9160 lqfp 48 pin ............................... ................................................... ..................... 7 3.1.2 pin description ................................... ................................................... ............................ 7 4 block diagram ..................................... ................................................... ....................... 12 5 application diagram ............................... ................................................... .................. 13 6 electrical characteristics ........................ ................................................... .......... 14 6.1 absolute maximum ratings .......................... ................................................... ......... 14 6.2 dc electrical characteristics ..................... ................................................... ............ 15 6.3 ac electrical characteristics ..................... ................................................... ............ 19 6.3.1 external 32khz xtal oscillator .................... ................................................... ............... 19 6.3.2 internal 49.152mhz oscillator ..................... ................................................... ................. 19 6.3.3 internal 10 khz oscillator ........................ ................................................... ..................... 19 7 package dimensions ................................ ................................................... ................. 20 7.1.1 48l lqfp (7x7x1.4mm footprint 2.0mm) .............. ................................................... ....... 20 8 ordering information .............................. ................................................... ............... 21 9 revision history .................................. ................................................... ...................... 22 important notice .................................................. .............................................. 23 www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 3 - revision v1.20 1 general description the ISD9160 is a system-on-chip product optimized f or low power, audio record and playback with an embedded arm? cortex?-m0 32-bit microcontroller cor e. the ISD9160 embeds a cortex?-m0 core running up to 50 mhz with 145k-byte of non-volatile flash memory and 12k-byte of embedded sram. it also comes equipped with a variety of peripheral devices, such as timers, watchdog timer (wdt), real -time clock (rtc), peripheral direct memory access (pdma), a variety of serial interfaces (uart , spi/ssp, i 2 c, i 2 s), pwm modulators, gpio, analog comparator, low voltage detector and brown-o ut detector. the ISD9160 comes equipped with a rich set of power saving modes including a deep power down (dpd) mode drawing less than 1 m a. a micro-power 10khz oscillator can periodically wake up the device from deep power down to check for other even ts. a standby power down (spd) mode can maintain a real time clock function at less than 10 m a. for audio functionality the ISD9160 includes a sigm a-delta adc with 80db snr performance coupled with a programmable gain amplifier (pga) capable of a maximum gain of 61db to enable direct connection of a microphone. audio output is provide d by a differential class d amplifier (dpwm) that can deliver 1w 1 of power to an 8 speaker. the ISD9160 provides eight analog enabled general p urpose io pins (gpio). these pins can be configured to connect to an analog comparator, can be configured as analog current sources or can be routed to the sdadc for analog conversion. they can also be used as a relaxation oscillator to perform capacitive touch sensing. 1 we suggest implementing thermal protection by util izing the temperature alarm; for details please refer to temperature alarm in design guide. www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 4 - revision v1.20 2 features core C arm? cortex?-m0 core runs up to 50mhz. C one 24-bit system tick timer for operating system s upport. C supports a variety of low power sleep and power dow n modes. C single-cycle 32-bit hardware multiplier. C nvic (nested vector interrupt controller) for 32 in terrupt inputs, each with 4-levels of priority. C serial wire debug (swd) support with 2 watchpoints/ 4 breakpoints. power management C wide operating voltage range from 2.5v to 5.5v. C power management unit (pmu) providing four levels o f power control. C deep power down (dpd) mode with sub micro-amp leaka ge (<1a). C wakeup from deep power down via dedicated wakeup pi n or timed operation from internal low power 10khz oscillator. C standby mode with limited ram retention and rtc ope ration (<10a). C wakeup from standby can be from any gpio interrupt, rtc or bod. C sleep mode with minimal dynamic power consumption. C 3v ldo for operation of external 3v devices such as serial flash. flash eprom memory C 145k bytes flash eprom for program code and data st orage. C 4kb of flash can be configured as boot sector for i sp loader. C support in-system program (isp) and in-circuit prog ram (icp) application code update C 1k byte page erase for flash C configurable boundary to delineate code and data fl ash. C support 2 wire in-circuit programming (icp) update from swd ice interface sram memory C 12k bytes embedded sram. clock control C one high speed and two low speed oscillators provid ing flexible selection for different applications. no external components necessary. C built-in trimmable oscillator with range of 16-50mh z. factory trimmed within 1% to settings of 49.152mhz and 32.768mhz. user trimmable with in-bui lt frequency measurement block (oscfm) using reference clock of 32khz crystal or e xternal reference source. C ultra-low power (<1ua) 10khz oscillator for watchdo g and wakeup from power-down or sleep operation. C external 32khz crystal input for rtc function and l ow power system operation. gpio C four i/o modes: quasi bi-direction push-pull output open-drain output input only with high impendence C ttl/schmitt trigger input selectable. C i/o pin can be configured as interrupt source with edge/level setting. C switchable pull-up. audio analog to digital converter C sigma delta adc with configurable decimation filter and 16 bit output. C 80db signal-to-noise (snr) performance. C programmable gain amplifier with 32 steps from -12 to 35.25db in 0.75db steps. C boost gain stage of 26db, giving maximum total gain of 61db. www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 5 - revision v1.20 C input selectable from dedicated mic pins or analog enabled gpio. C programmable biquad filter to support multiple samp le rates from 8-32khz. C dma support for minimal cpu intervention. differential audio pwm output (dpwm) C direct connection of speaker C 1w drive capability into 8 load. C high efficiency 88% C configurable up-sampling to support sample rates fr om 8-32khz. C dma support for minimal cpu intervention. timers C two timers with 8-bit pre-scaler and 24-bit resolut ion. C counter auto reload. watch dog timer C default on/off by configuration setting C multiple clock sources C 8 selectable time out period from micro seconds to seconds (depending on clock source) C wdt can wake up power down/sleep. C interrupt or reset selectable on watchdog time-out. rtc C real time clock counter (second, minute, hour) and calendar counter (day, month, year) C alarm registers (second, minute, hour, day, month, year) C selectable 12-hour or 24-hour mode C automatic leap year recognition C time tick and alarm interrupts. C device wake up function. C supports software compensation of crystal frequency by compensation register (fcr) pwm/capture C built-in up to two 16-bit pwm generators provide tw o pwm outputs or one complementary paired pwm outputs. C the pwm generator equipped with a clock source sele ctor, a clock divider, an 8-bit pre-scaler and dead-zone generator for complementary paired pw m. C pwm interrupt synchronous to pwm period. C 16-bit digital capture timers (shared with pwm time rs) provide rising/falling capture inputs. C support capture interrupt uart C uart ports with flow control (tx, rx, cts and rts) C 8-byte fifo. C support irda (sir) and lin function C programmable baud-rate generator up to 1/16 of syst em clock. spi C master up to 20 mbps / slave up to 10 mbps. C support microwire/spi master/slave mode (ssp) C full duplex synchronous serial data transfer C variable length of transfer data from 1 to 32 bits C msb or lsb first data transfer C 2 slave/device select lines when used in master mod e. C hardware crc calculation module available for crc c alculation of data stream. C dma support for burst transfers. i2c C master/slave up to 1mbit/s C bidirectional data transfer between masters and sla ves C multi-master bus (no central master). www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 6 - revision v1.20 C arbitration between simultaneously transmitting mas ters without corruption of serial data on the bus C serial clock synchronization allows devices with di fferent bit rates to communicate via one serial bus. C serial clock synchronization can be used as a hands hake mechanism to suspend and resume serial transfer. C programmable clock allowing versatile rate control. C i2c-bus controller supports multiple address recogn ition. i 2 s C interface with external audio codec. C operate as either master or slave. C capable of handling 8, 16, 24 and 32 bit word sizes C mono and stereo audio data supported C i 2 s and msb justified data format supported C two 8 word fifo data buffers are provided, one for transmit and one for receive C generates interrupt requests when buffer levels cro ss a programmable boundary C supports dma requests, for transmit and receive brown-out detector C with 8 levels: 2.1v, 2.2v, 2.4v, 2.5v, 2.625v, 2.8v , 3.0v, and 4.6v C supports time-multiplex operation to minimize power consumption. C supports brownout interrupt and reset option built in low dropout voltage regulator (ldo) C capable of delivering 30ma load current. C configurable for output voltage of 1.8v, 2.4v, 3.0v and 3.3v C eight gpio (gpioa<7:0>) operate from ldo voltage do main allowing direct interface to, for example, 3v spi flash. C can be bypassed and voltage domain supplied directl y from system power. additional features C over temperature alarm. can generate interrupt if d evice exceeds safe operating temperature. C temperature proportional voltage source which can b e routed to adc for temperature measurements. C digital microphone interface. operating temperature: -40c~85c package: C all green package (rohs) lqfp 48-pin www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 7 - revision v1.20 3 part information and pin configuration 3.1 pin configuration 3.1.1 ISD9160 lqfp 48 pin 38 37 40 39 42 41 44 43 46 45 47 48 20 21 18 19 16 17 14 15 13 22 23 24 pa.8/uart_tx/i2s_fs spk+ vccspk vssspk resetn spk- vccspk pa.9/uart_rx/i2s_bclk pa.15/tm1/sdin nc ice_dat ice_clk mic+ i2c_scl/i2s_sdo/uart_ctsn/pa.11 xo32k xi32k vssa vmid i2c_sda/i2s_sdi/uart_rtsn/pa.10 pwm0/spkp/i2s_fs/pa.12 mic- micbias vcca pwm1/spkm/i2s_bclk//pa.13 3.1.2 pin description the ISD9160 is a low pin count device where many pi ns are configurable to alternative functions. all general purpose input/output (gpio) pins can be con figured to alternate functions as described in the table below. pin no. pin name pin type alt cfg description lqfp 48 www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 8 - revision v1.20 pin no. pin name pin type alt cfg description lqfp 48 1 wakeup i pull low to wake part from deep power down 2 pb.7 a/i/o 0 general purpose input/output pin, analog capable; port b, bit 7 i2s_sdo o 1 serial data output for i2s interface cmp7 aio 2 configure as relaxation oscillator for capacitive touch sensing 3 pb.6 a/i/o 0 general purpose input/output pin, analog capable; port b, bit 6 i2s_sdi i 1 serial data input for i2s interface cmp6 aio 2 configure as relaxation oscillator for capacitive touch sensing spi_mosi1 o 3 master out, slave in channel 1 for spi interface 4 pb.5 a/i/o 0 general purpose input/output pin, analog capable; port b, bit 5 pwm1b o 1 pwm channel 1 complementary output pin cmp5 aio 2 configure as relaxation oscillator for capacitive touch sensing spi_miso1 i 3 master in, slave out channel 1 for spi interface 5 pb.4 a/i/o 0 general purpose input/output pin, analog capable; port b, bit 4 pwm0b o 1 pwm channel 0 complementary output pin cmp4 aio 2 configure as relaxation oscillator for capacitive touch sensing spi_mosi0 o 3 master out, slave in channel 0 for spi interface 6 pb.3 a/i/o 0 general purpose input/output pin, analog capable; port b, bit 3 i2c_sda i/o 1 serial data, i2c interface cmp3 aio 2 configure as relaxation oscillator for capacitive touch sensing spi_miso0 i 3 master in, slave out channel 0 for spi interface 7 pb.2 a/i/o 0 general purpose input/output pin, analog capable; port b, bit 2 i2c_scl i/o 1 serial clock, i2c interface cmp2 aio 2 configure as relaxation oscillator for capacitive touch sensing spi_sclk i/o 3 serial clock for spi interface 8 pb.1 a/i/o 0 general purpose input/output pin, analog capable; p ort b, bit 1. triggers external interrupt 1 (eint1/irq3) mclk o 1 master clock output for synchronizing external de vice cmp1 aio 2 configure as relaxation oscillator for capacitive touch sensing spi_ssb1 o 3 slave select bar 1 for spi interface 9 pb.0 a/i/o 0 general purpose input/output pin, analog capable; p ort b, bit 0. triggers external interrupt 0 (eint0/irq2) spi_ssb1 o 3 slave select bar 1 for spi interface www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 9 - revision v1.20 pin no. pin name pin type alt cfg description lqfp 48 cmp0 aio 2 configure as relaxation oscillator for capacitive touch sensing spi_ssb0 i/o 3 slave select bar 0 for spi interface 10 vccd p main digital supply for chip. supplies all io excep t analog, speaker driver and pa<7:0> 11 vreg p logic regulator output decoupling pin. a 1f capaci tor returning to vssd must be placed on this pin. 12 nc should remain unconnected. 13 nc should remain unconnected. 14 pa.15 i/o 0 general purpose input/output pin; port a, bit 15 tm1 i 1 external input to timer 1 sdin i 2 sigma delta bit stream input for digital mic mode 15 pa.9 i/o 0 general purpose input/output pin; port a, bit 9 uart_rx i 1 receive channel of uart i2s_bclk i/o 2 bit clock for i2s interface 16 pa.8 i/o 0 general purpose input/output pin; port a, bit 8 uart_tx o 1 transmit channel of uart i2s_fs i/o 2 frame sync clock for i2s interface 17 vccspk p power supply for pwm speaker driver 18 spk+ o positive speaker driver output 19 vssspk p ground for pwm speaker driver 20 spk- o negative speaker driver output 21 vccspk p power supply for pwm speaker driver 22 resetn i external reset input. pull this pin low to reset de vice to initial state. has internal weak pull-up. 23 ice_dat i/o serial wire debug port data pin. has internal weak pull-up. 24 ice_clk i serial wire debug port clock pin. has internal wea k pull-up. 25 vssd p digital ground. 26 pa.7 i/o 0 general purpose input/output pin; port a, bit 7 i2s_sdo o 1 serial data out for i2s interface 27 pa.6 i/o 0 general purpose input/output pin; port a, bit 6 i2s_sdi i 1 serial data in for i2s interface 28 pa.5 i/o 0 general purpose input/output pin; port a, bit 5 i2s_bclk i/o 1 bit clock for i2s interface www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 10 - revision v1.20 pin no. pin name pin type alt cfg description lqfp 48 29 pa.4 i/o 0 general purpose input/output pin; port a, bit 4 i2s_fs i/o 1 frame sync clock for i2s interface 30 pa.3 i/o 0 general purpose input/output pin; port a, bit 3 spi_miso0 i 1 master in, slave out channel 0 for spi interface i2c_sda i/o 2 serial data, i2c interface 31 pa.2 i/o 0 general purpose input/output pin; port a, bit 2 spi_ssb0 i/o 1 slave select bar 0 for spi interface 32 vdd33 p ldo regulator output. if used, a 1f capacitor must be placed to ground. if not used then tie to vccd. 33 pa.1 i/o 0 general purpose input/output pin; port a, bit 1 spi_sclk i/o 1 serial clock for spi interface i2c_scl i/o 2 serial clock, i2c interface 34 pa.0 i/o 0 general purpose input/output pin; port a, bit 2 spi_mosi0 o 1 master out, slave in channel 0 for spi interface mclk o 2 master clock output. 35 vccldo p power supply for ldo, should be connected to vccd 36 pa.14 i/o 0 general purpose input/output pin; port a, bit 14 sdclk o 1 clock output for digital microphone mode. sdclkn o 2 inverse clock output for digital microphone mode. 37 pa.13 i/o 0 general purpose input/output pin; port a, bit 13 pwm1 o 1 pwm1 output. spkm o 2 equivalent to spk-. i2s_bclk i/o 3 bit clock for i2s interface 38 pa.12 i/o 0 general purpose input/output pin; port a, bit 12 pwm0 o 1 pwm0 output. spkp o 2 equivalent to spk+ i2s_fs i/o 3 frame sync clock for i2s interface 39 xo32k o 32.768khz crystal oscillator output 40 xi32k i 32.768khz crystal oscillator input. max voltage 1. 8v 41 vssa ap ground for analog circuitry. 42 vmid o mid rail reference. connect 4.7f to vssa. 43 mic+ ai positive microphone input. www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 11 - revision v1.20 pin no. pin name pin type alt cfg description lqfp 48 44 mic- ai negative microphone input. 45 micbias ao microphone bias output. 46 vcca ap analog power supply. 47 pa.11 i/o 0 general purpose input/output pin; port a, bit 11 i2c_scl i/o 1 serial clock, i2c interface i2s_sdo o 2 serial data out i2s interface uart_ctsn i 3 uart clear to send input. 48 pa.10 i/o 0 general purpose input/output pin; port a, bit 10 i2c_sda i/o 1 serial data, i2c interface i2s_sdi i 2 serial data in i2s interface uart_rtsn o 3 uart request to send output. note: pin type i=digital input, o=digital output; ai=anal og input; p=power pin; ap=analog power www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 12 - revision v1.20 4 block diagram ahb lite cortex m0 ram 12kb embedded flash 145kb ahb to apb bridge flash mem controller i2c pwm speaker driver spi timers/pwm debug interface system control/pmu gpio clk ctrl 50mhz internal osc. 32khz rtc osc audio adc uart wdt i2s ldo 3.0v ldo 1.8v bod pdma por 10khz low power osc peripherals with pdma figure 4-1 ISD9160 block diagram www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 13 - revision v1.20 5 application diagram mic+ mic vssd vccd vccd 0.1 uf 47 uf vccd 17 21 19 vssspk vccspk vccspk 43 44 : digital ground; : analog ground; 4.7uf 2.2 k 0.1uf 2.2 k 0.1uf mic spk+ spk 18 20 46 vssa vcca 0.1 uf 47 uf vcca 41 csb do wpb gnd vcc holdb clk dio w25q pa.3/spi_miso0 pa.2/spi_ssb0 pa.1/spi_sclk pa.0/spi_mosi0 30 31 33 34 10 25 0.1 uf 47 uf ISD9160 lqfp48 xi32k xo32k 39 40 20pf 20pf 32.768k 45 micbias 4.7uf vmid 42 vreg 11 1uf 32 vdd33 35 vccldo 1uf 0.1uf www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 14 - revision v1.20 6 electrical characteristics 6.1 absolute maximum ratings symbol parameter min max unit dc power supply vdd - vss -0.3 +6.0 v input voltage vin vss-0.3 vdd+0.3 v oscillator frequency 1/t clcl 0 40 mhz operating temperature ta -40 +85 c storage temperature tst -55 +150 c maximum current into v dd - 120 ma maximum current out of v ss 120 ma maximum current sunk by a i/o pin 35 ma maximum current sourced by a i/o pin 35 ma maximum current sunk by total i/o pins 100 ma maximum current sourced by total i/o pins 100 ma note: exposure to conditions beyond those listed under a bsolute maximum ratings may adversely affects the l ift and reliability of the device. www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 15 - revision v1.20 6.2 dc electrical characteristics (vdd-vss=3.3v, ta = 25 c, f osc = 49.152 mhz unless otherwise specified.) parameter sym. specification test conditions min. typ. max. uni t operation voltage v dd 2.5 5.5 v v dd =2.5v ~ 5.5v up to 50 mhz power ground v ss av ss -0.3 v analog operating voltage av dd 0 v dd v analog reference voltage vref 0 av dd v operating current normal run mode @ 49.152 mhz i dd1 27 ma v dd = 5.5v, enable all ip. i dd2 24 ma v dd =5.5v, disable all ip i dd3 24 ma v dd = 3v, enable all ip i dd4 21 ma v dd = 3v, disable all ip operating current normal run mode @ 12.288mhz i dd5 19 ma v dd = 5.5v enable all ip i dd6 15 ma v dd = 5.5v, disable all ip i dd7 15 ma v dd = 3v enable all ip i dd8 7 ma v dd = 3v, disable all www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 16 - revision v1.20 operating current normal run mode @ 4.9152mhz i dd9 9.8 ma v dd = 5.5v, enable all ip. i dd10 7.9 ma v dd = 5.5v, disable all ip. i dd11 8.9 ma v dd = 3v, enable all ip. i dd12 7.1 ma v dd = 3v, disable all ip. operating current normal run mode @ 32.768mhz i dd9 15 ma v dd = 5.5v, enable all ip. i dd10 11 ma v dd = 5.5v, disable all ip. i dd11 19 ma v dd = 3v, enable all ip. i dd12 7.1 ma v dd = 3v, disable all ip. operating current sleep mode i idle1 10 ma v dd = 5.5v i idle1 9 ma v dd = 5.5v operating current deep sleep mode i idle1 10 ma v dd =3.3v i idle1 8 ma v dd = 3.3v stop mode current i idle1 5 ua v dd = 5.5v 32k/10krunning standby power down mode(spd) i idle1 3 ua v dd =3.3v 32k running with rtc i idle1 1 ua v dd = 3.3v 10k running operating current deep power down mode(dpd) i idle1 500 na v dd =3.3v wakeup with10k i idle1 na v dd = 3.3v wakeup with wakeup pin www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 17 - revision v1.20 input current pa, pb (quasi-bidirectional mode) i in1 -60 - +15 m a v dd = 5.5v, v in = 0v or v in =v dd input current at /reset [1] i in2 -55 -45 -30 m a v dd = 3.3v, v in = 0.45v input leakage current pa, pb i lk -2 - +2 m a v dd = 5.5v, 0 ISD9160 datasheet release date: oct 29, 2011 - 18 - revision v1.20 source current pa, pb quasi-bidirectional mode) i sr11 -300 -370 -450 m a v dd = 4.5v, v s = 2.4v i sr12 -50 -70 -90 m a v dd = 2.7v, v s = 2.2v i sr12 -40 -60 -80 m a v dd = 2.5v, v s = 2.0v source current pa, pb (push- pull mode) i sr21 -20 -24 -28 ma v dd = 4.5v, v s = 2.4v i sr22 -4 -6 -8 ma v dd = 2.7v, v s = 2.2v i sr22 -3 -5 -7 ma v dd = 2.5v, v s = 2.0v sink current pa, pb (quasi-bidirectional and push- pull mode) i sk1 10 16 20 ma v dd = 4.5v, v s = 0.45v i sk1 7 10 13 ma v dd = 2.7v, v s = 0.45v i sk1 6 9 12 ma v dd = 2.5v, v s = 0.45v brownout voltage with bov_vl [2:0] =000b v bo2.1 2.15 v brownout voltage with bov_vl [2:0] =001b v bo2.2 2.25 v brownout voltage with bov_vl [2:0] =010b v bo2.4 2.45 v brownout voltage with bov_vl [2:0] =011b v bo2.5 2.55 v brownout voltage with bov_vl [2:0] =100b v bo2.7 2.7 v brownout voltage with bov_vl [2:0] =101b v bo2.8 2.8 v brownout voltage with bov_vl [2:0] =110b v bo3.0 3.0 v brownout voltage with bov_vl [2:0] =111b v bo4.5 4.55 v hysteresis range of bod voltage v bh - mv v dd = 2.5v~5.5v notes: 1. /rest pin is a schmitt trigger input. 2. crystal input is a cmos input. 3. pins of p0, p1, p2, p3 and p4 can source a trans ition current when they are being externally driven from 1 to 0. in the condition of v dd =5.5v, 5he transition current reaches its maximum value when vin approximates to 2v . www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 19 - revision v1.20 6.3 ac electrical characteristics 6.3.1 external 32khz xtal oscillator parameter condition min. typ. max. unit input clock frequency external crystal - 32.768 - k hz temperature - -40 - 85 v dd - 2.5 - 5.5 v 6.3.2 internal 49.152mhz oscillator parameter condition min. typ. max. unit supply voltage [1] - 2.5 - 5.5 v center frequency - - 49.152 mhz calibrated internal oscillator frequency +25 c; v dd =5v - % -40 c~+85 c; v dd =2.5v~5.5v - % 6.3.3 internal 10 khz oscillator parameter condition min. typ. max. unit supply voltage - 2.5 - 5.5 v center frequency - - 10 - khz calibrated internal oscillator frequency +25 c; v dd =5v - % -40 c~+85 c; v dd =2.5v~5.5v - % notes: 1. internal operation voltage comes from ldo. www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 20 - revision v1.20 7 package dimensions 7.1.1 48l lqfp (7x7x1.4mm footprint 2.0mm) y seating plane d e e b a2 a1 a 1 12 48 d h e h l1 l c q controlling dimension : millimeters controlling dimension : millimeters controlling dimension : millimeters controlling dimension : millimeters 0.10 0 7 0 0.004 1.00 0.75 0.60 0.45 0.039 0.030 0.024 0.018 9.10 9.00 8.90 0.358 0.354 0.350 0.50 0.20 0.25 1.45 1.40 0.10 0.15 1.35 0.008 0.010 0.057 0.055 0.026 7.10 7.00 6.90 0.280 0.276 0.272 0.004 0.006 0.053 symbol min nom max max nom min dimension in inch dimension in mm ab c d e h d h e ly 0 aa l 1 12 e 0.008 0.006 0.15 0.20 7 0.020 0.35 0.65 0.10 0.05 0.002 0.004 0.006 0.15 9.10 9.00 8.90 0.358 0.354 0.350 7.10 7.00 6.90 0.280 0.276 0.272 0.014 37 36 25 2413 www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 21 - revision v1.20 8 ordering information i9160xfi x: blank: standard v: standard + voice recognition f: lqfp-48 i: industrial -40 c to 85 c www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 22 - revision v1.20 9 revision history version date page/ chap. description v0.1 may 25, 2011 - first release. v1.01 sep 6, 2011 - add better description of eint0/1 and pb0/1 interr upts. unify the naming of capacitive touch sensing. v1.10 sep 30, 2011 - revise the level value of brown-out detector in fe ature. correct the maximum voltage of dc power supply in section 6.1 absolute maximum r atings v1.20 oct 29, 2011 - update dc spec. add ordering information. www.datasheet.co.kr datasheet pdf - http://www..net/
ISD9160 datasheet release date: oct 29, 2011 - 23 - revision v1.20 important notice nuvoton products are not designed, intended, author ized or warranted for use as components in systems or equipment intended for surgical impla ntation, atomic energy control instruments, airplane or spaceship instruments, tra nsportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. furthermore, nuvoton products are not intended for applications wherein failure of nuvoton products could result or lead to a situatio n where personal injury, death or severe property or environmental damage could occur. nuvoton customers using or selling these products f or use in such applications do so at their own risk and agree to fully indemnify nuvoton for a ny damages resulting from such improper use or sales. please note that all data and specifications are su bject to change without notice. all the trademarks of products and companies mentioned in t his datasheet belong to their respective owners. www.datasheet.co.kr datasheet pdf - http://www..net/

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	To Download ISD9160 Datasheet File
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